In 1955 while addressing the National Academy of Sciences Richard Feynman stated "Scientific knowledge is a body of statements of varying degrees of certainty." As usual, Feynman's statement was spot on, and holds true decades later. In his famous "Plenty of Room at the Bottom" lecture Feynman talked about what we now call nanotechnology, and all the different applications. Here I am, half a century later, working "at the bottom" and living in a world of uncertainty. I hope to share some of the exciting discoveries at the nanoscale and explain how they apply to my passion of biotechnology- as well as the everyday world. Learn more about Nicholas Fahrenkopf
My posts are presented as opinion and commentary and do not represent the views of LabSpaces Productions, LLC, my employer, or my educational institution.
Please wait while my tweets load
Today was a travel day, but I was still able to attend a number of biomedical engineering talks which are personally interesting to me, and some talks on memristors, which some of my lab mates work on. I’ve explained elsewhere what a memristor is, but briefly it is a metal-insulator-metal material stack that has two resistance states (high and low). If that sounded like goobldy-gook to you, imagine a chunk of wood sandwiched in between two chunks of copper metal. Normally electricity won’t flow between the two chunks of copper through the wood (high resistance). In a memristor you can apply a high voltage to create a conductive path through the “wood” creating a low resistance state. This is useful for computers because it can be used as a memory device: high versus low translates to a 1 or a 0. If you make lots of these you have the memory chip that could be used in your computer or cell phone. These are better than what we have now because they take no power to maintain the data, and can be fabricated much smaller so you can store even more songs and apps on your phone.
Now let’s get to the presentations which were really interesting. Most memristors really are slabs of metal and insulators- not copper and wood, but maybe platinum and hafnium dioxide. A question one of my classmates had for his PhD dissertation was, could you make these devices using nanoparticles? He ended up having a lot of trouble with this, so I was interested to find a presentation of nanowire memristors. What they showed was that because of the small scale of the wires the chemical reaction within the wire that leads to the memristor activation has to compete with chemical reactions on the surface of the wire. You don’t see this competition in most memristors because the surface area is small compared to the cross sectional area, but in wires the reverse is true. They went on to show that there is a small window where nanowire memrsitors work in terms of atmospheric pressure and chemical components. Too much or too little atmosphere and the memristor reaction gets beaten by oxidation or reduction at the surface.
Aside from the memristor talk, I encountered a pair of posters at night about “wafer scale” integration of carbon nanotubes. Carbon nanotubes (CNTS) are really attractive for nanoelectronics applications because of their exceptional carrier mobility. Essentially, electricity moves very fast in them. The issue is these tubes are hard to place exactly where you need them like we do with traditional transistors. Usually the CNTs are flooded on a wafer and you hope at least some of them land in useful places, or you pattern your electrodes after the fact. Neither of these methods is useful for wafer scale production. Bottom-up you can “grow” wires where you want them, but yield here is low, and you can’t control the number of wires. In contrast, what some of my research is on, are silicon “fins” which are fabricated using conventional photolithography down to 28nm. I use them for DNA sensing because of their nano dimensions, but CNTs would also work… if we could produce them on the wafer scale.
So I was interested to come across two posters that announced wafer-scale CNT device creation. One used dielectrophoresis whereby a potential is applied between two electrodes as a fluid of CNTs is introduced, and then the CNTS orient to the electric field between the electrodes. So, it was wafer scale, but I can’t see how this would REALLY scale up. If you had a million devices on a die, and a hundred dies on a wafer, you couldn’t do this technique efficiently. The other technique was to flood the wafer with CNTs- basically make a layer of CNTs- and then lithographically pattern the CNT layer to leave the CNTs where you want them. This presenter even acknowledged that the quality of these CNT devices was poor, so I’m not sure this would work. Also, the advantage for sensing is have only a few CNTs so quality would be very important.
The last really cool poster I ran into was asymmetrical nanoparticles. Basically by co-incubating gold nanoparticles with hydrophobic, hydrophilic and amphiphillic polymers the particles end up being dipoles with a hydrophobic and hydrophilic end. You can then selectively functionalize each end to do some selective self-assembly. I wasn’t really sure about what you could do with the, but it was pretty cool. The presenter had ideas of other experiments she would do, which is great, but I don’t see the use for this. I guess that makes me an engineer…
This post has been viewed: 1849 time(s)